1. Field of the Invention
The present invention relates generally to image sensors, and more particularly, to a correlated double sampling (CDS) unit providing attenuation of voltage loss from parasitic capacitance in an image sensor.
2. Background of the Invention
Image sensors are used to produce still images or video images. An image sensor may be implemented as a charge coupled device (CCD) type or a complimentary metal oxide semiconductor (CMOS) type. The image sensor includes a plurality of pixels arranged in rows and columns of a 2-dimenstional array or matrix. Each of the pixels outputs a respective reset signal and a respective image signal when selected by a row selection signal. The image sensor includes several hundreds of thousands to several millions of pixels to produce a high resolution image.
The image sensor includes an analog-to-digital converter (ADC) that performs correlated double sampling (CDS) based on the reset signal and the image signal to generate a digital image signal. The ADC may perform correlated double sampling of a signal output from the pixel array using a single CDS circuit. Alternatively, a respective CDS circuit is formed for each column of the pixel array.
With correlated double sampling, a fixed pattern noise or low frequency noise is removed so that a signal to noise (S/N) ratio may be improved. However, parasitic capacitance within the CDS circuit may cause distortion in the output signal and may reduce the S/N ratio of the image sensor.